Semiconductor package and method of manufacturing the same

A semiconductor package comprising:

• a lower substrate;
• a redistribution layer on the lower substrate;
• and
• a first semiconductor device and a second semiconductor device arranged on the redistribution layer and horizontally spaced apart from each other,
• wherein the lower substrate includes:
• first and second lower insulating layers sequentially stacked, and
• a first interconnection line disposed on the second lower insulating layer,
• wherein the redistribution layer includes:
• first and second inorganic insulating layers sequentially stacked, and
• a first connection pad and a second connection pad arranged in the second inorganic insulating layer and spaced apart from each other,
• wherein the first semiconductor device includes:
• a third inorganic insulating layer disposed at a lower end of the first semiconductor device and contacting the second inorganic insulating layer, and
• a third connection pad disposed in the third inorganic insulating layer and contacting the first connection pad, and
• wherein the second semiconductor device includes:
• a fourth inorganic insulating layer disposed at a lower end of the second semiconductor device and contacting the second inorganic insulating layer, and
• a fourth connection pad disposed in the fourth inorganic insulating layer and contacting the second connection pad,
• wherein the first and second lower insulating layers are formed of different materials from materials of the first and second inorganic insulating layers, and
• wherein the first inorganic insulating layer contacts a side surface and upper surface of the first interconnection line.

A semiconductor package comprising:

• a lower substrate;
• external connection terminals bonded to a lower portion of the lower substrate;
• a redistribution layer on the lower substrate;
• and
• a first semiconductor device and a second semiconductor device arranged on the redistribution layer and horizontally spaced apart from each other,
• wherein the lower substrate includes:
• first and second lower insulating layers sequentially stacked, and
• a first interconnection line disposed on the second lower insulating layer,
• wherein the redistribution layer includes:
• first and second inorganic insulating layers sequentially stacked, and
• a first connection pad and a second connection pad arranged in the second inorganic insulating layer and horizontally spaced apart from each other,
• wherein the first semiconductor device includes:
• a third inorganic insulating layer disposed at a lower end of the first semiconductor device and contacting the second inorganic insulating layer, and
• a third connection pad disposed in the third inorganic insulating layer and contacting the first connection pad, and
• wherein the second semiconductor device includes:
• a fourth inorganic insulating layer disposed at a lower end of the second semiconductor device and contacting the second inorganic insulating layer, and
• a fourth connection pad disposed in the fourth inorganic insulating layer and contacting the second connection pad,
• wherein the first and second lower insulating layers are formed of different materials from materials of the first and second inorganic insulating layers,
• wherein an upper surface of the second inorganic insulating layer has a surface roughness of an amount greater than 0 Å to 10 Å,
• wherein the second lower insulating layer has a first vertical thickness, and
• wherein the first inorganic insulating layer has a second vertical thickness less than the first vertical thickness.