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US 2026/0076217 A1Published application
Semiconductor package substrate including graphene layer, method of manufacturing the semiconductor package substrate, and semiconductor package including the semiconductor package substrate
AssigneeHaesung Ds Co., Ltd.
InventorsMin PARK, Su Yeon SON, Ho Sang YU, Jin Woo LEE, Hyun Ji YUN
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Abstract
A semiconductor package substrate includes a base substrate including a conductive material, a die pad portion, and a lead portion, a metal catalyst layer disposed on the base substrate, and a graphene layer disposed on the metal catalyst layer, wherein the semiconductor package substrate has a Vickers hardness of 135 to 150.
Claims10
A semiconductor package substrate comprising:
- a base substrate comprising a conductive material, a die pad portion, and a lead portion;
- a metal catalyst layer disposed on the base substrate;
- and
- a graphene layer disposed on the metal catalyst layer,
- wherein the semiconductor package substrate has a Vickers hardness of 135 to 150.
2 more elements
Dependencies are inferred from the claim text.