Semiconductor package and package module including the same

A semiconductor package, comprising:

• a film substrate that comprises a chip region, a first edge region, and a second edge region, wherein the first edge region and the second edge region are spaced apart from each other in a first direction with the chip region therebetween;
• a semiconductor chip on the chip region, wherein the semiconductor chip comprises first conductive bumps adjacent to the first edge region and second conductive bumps adjacent to the second edge region;
• first pads and dummy pads on the first edge region, wherein the dummy pads are electrically insulated from first conductive bumps and the second conductive bumps;
• second pads on the second edge region;
• first lines that are electrically connected to ones of the first pads;
• and
• second lines that are electrically connected to ones of the second pads,
• wherein the first pads at least partially overlap the semiconductor chip in a first direction that is parallel to an upper surface of the film substrate.

A semiconductor package module, comprising:

• a circuit substrate;
• a display panel spaced apart from the circuit substrate;
• and
• a semiconductor package between the circuit substrate and the display panel,
• wherein the semiconductor package comprises:
• a film substrate that comprises a chip region, a first edge region, and a second edge region, wherein the chip region is between the first edge region and the second edge region, wherein the first edge region is adjacent to the circuit substrate, and wherein the second edge region is adjacent to the display panel;
• a semiconductor chip on the chip region;
• first pads and second pads on the first edge region;
• third pads on the second edge region;
• first lines between the film substrate and the semiconductor chip, wherein the first lines are electrically connected to ones of the first pads;
• second lines between the film substrate and the semiconductor chip, wherein the second lines are electrically connected to ones of the third pads;
• first conductive bumps between the semiconductor chip and the first lines;
• and
• second conductive bumps between the semiconductor chip and the second lines,
• wherein the second pads are farther than the first pads from a center of the film substrate in a first direction,
• wherein at least two of the first pads are spaced part from each other in the first direction a first pitch, and
• wherein the first pitch is in a range of about 120 μm to about 300 μm.