Multi-chiplets packaging for jet-cooled, diamond-substrated chips
AssigneeDiamond Foundry Inc.
InventorsJeroen Van Duren, Martin Roscheisen
Life of this patent
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AssigneeDiamond Foundry Inc.
InventorsJeroen Van Duren, Martin Roscheisen
Estimating the term…
A device package and heatsink assembly includes a device package containing one or more logic elements and one or more other integrated circuit devices mounted to a package substrate and one or more heatsinks. The other integrated circuit devices are higher above the package substrate's surface than the logic elements. Each heatsink contains chambers for a fluid heat transfer medium. A surface of the logic elements is thermally coupled to the fluid. A semiconductor chip package fabrication method includes bonding a diamond-containing dielet to a semiconductor logic die to form a logic die structure; mounting the logic die structure to a package substrate with the logic die sandwiched between the dielet and the substrate, exposing a surface of the dielet; and mounting one or more other integrated circuit devices to the package substrate. The other integrated circuit devices are higher above the package substrate's surface than the logic die structure.
A low thermal resistance device package and heatsink assembly, comprising:
A method for fabricating a semiconductor chip package, comprising:
Dependencies are inferred from the claim text.