Power semiconductor devices

A power semiconductor device comprising:

• a first region including a transistor;
• a second region spaced apart from the first region, the second region including a Schottky barrier diode;
• a passivation layer on the first region and the second region;
• and
• a third region between the first region and the second region, the third region being a region in which at least a portion of the passivation layer is removed,
• wherein the first region includes,
• a first SiC substrate of a first conductivity type,
• a well region of a second conductivity type on the first SiC substrate,
• a source region of the first conductivity type within the well region,
• a gate electrode on an upper surface of the well region, and
• a source electrode connected to the source region, and
• the second region includes,
• a second SiC substrate of the first conductivity type, and
• an electrode layer connected to the second SiC substrate, and
• wherein the first SiC substrate and the second SiC substrate are respective parts of an integral body.

A power semiconductor device comprising:

• a substrate including SiC of a first conductivity type, the substrate including a first region and a second region;
• a well region of a second conductivity type on the substrate, the well region being in the first region;
• a source region of the first conductivity type within the well region;
• a gate electrode on and extending along an upper surface of the well region;
• a source electrode connected to the source region in the first region;
• a metal layer connected to the substrate in the second region;
• a passivation layer covering the source electrode and the metal layer, the passivation layer including a first pad region and a second pad region, the first pad region exposing at least a portion of the source electrode, the second pad region exposing at least a portion of the metal layer;
• and
• a connecting member electrically connecting the source electrode exposed in the first pad region and the metal layer exposed the second pad region,
• wherein the passivation layer defines a recessed portion between the first region and the second region, and the recessed portion defines a scribe lane.