Semiconductor circuit for memory device and method of manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorCHIN-MING FU
Life of this patent
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Abstract
A semiconductor component for a memory device is provided. The semiconductor component comprises a first active region extending in a first direction; a second active region extending in the first direction; a first conductive layer disposed across the first active region and the second active region, in a second direction substantially perpendicular to the first direction; a second conductive layer extending in the first direction; and a first conductive via connecting the first conductive layer and the second conductive layer.
Claims20
A semiconductor component for a memory device, comprising:
- a first conductive layer extending in a first direction;
- a second conductive layer extending in the first direction;
- a first gate region extending in the first direction and disposed between the first conductive layer and the second conductive layer;
- a third conductive layer extending in the first direction;
- a second gate region extending in the first direction and disposed between the second conductive layer and the third conductive layer;
- a fourth conductive layer extending across the first conductive layer, the first gate region, and the second conductive layer, in a second direction substantially perpendicular to the first direction;
- and
- a fifth conductive layer extending across the second conductive layer, the second gate region, and the third conductive layer, in the second direction, wherein
- the fourth conductive layer is electrically connected to the first conductive layer and the second conductive layer, and is isolated from the first gate region;
- and
- the fifth conductive layer is electrically connected to the second conductive layer and the third conductive layer, and is isolated from the second gate region.
A semiconductor component for a memory device, comprising:
- a first gate region extending in a first direction;
- a second gate region extending in the first direction;
- a third gate region extending in the first direction;
- a first conductive layer extending in a second direction substantially perpendicular to the first direction;
- a second conductive layer extending in the second direction;
- a third conductive layer extending in the second direction;
- and
- a fourth conductive layer extending in the first direction and between the first gate region and the second gate region, wherein
- the first conductive layer extending across the first gate region, the fourth conductive layer, and the second gate region and electrically connecting the first gate region and the second gate region;
- and
- the second gate region and the third gate region are electrically connected through the second conductive layer.
A method of forming a semiconductor component for a memory device, comprising:
- providing a substrate comprising a first active region and a second active region;
- forming a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer at a first elevation level, extending across the first active region and the second active region of the substrate;
- forming a fifth conductive layer, a sixth conductive layer, and a seventh conductive layer extending perpendicular to the first conductive layer at a second elevation level above the first elevation level;
- forming a first conductive via connecting the first conductive layer and the fifth conductive layer;
- forming a second conductive via connecting the second conductive layer and the fifth conductive layer;
- forming a third conductive via connecting the second conductive layer and the sixth conductive layer;
- and
- forming a fourth conductive via connecting the third conductive layer and the sixth conductive layer.
Dependencies are inferred from the claim text.