Semiconductor devices

A semiconductor device, comprising:

• a bit line structure;
• cell channel structures on the bit line structure and respectively extending in a vertical direction perpendicular to a surface of the semiconductor device;
• word lines between the cell channel structures;
• first contact patterns on the cell channel structures and electrically connected to the cell channel structures;
• second contact patterns on the first contact patterns;
• an information storage structure on the second contact patterns;
• and
• a first contact structure including a first contact plug connected to the bit line structure, a first connection portion having a width, in a horizontal direction parallel to the surface of the semiconductor device and perpendicular to the vertical direction, greater than a width, in the horizontal direction, of the first contact plug on the first contact plug, and a first contact barrier layer on a side surface and a lower surface of the first contact plug, and a side surface and a lower surface of the first connection portion,
• wherein upper surfaces of each of the second contact patterns are coplanar with an upper surface of the first contact structure, relative to the surface of the semiconductor device.

A semiconductor device, comprising:

• a bit line structure;
• cell channel structures on the bit line structure and respectively extending in a vertical direction perpendicular to a surface of the semiconductor device;
• word lines between the cell channel structures;
• first contact patterns on the cell channel structures and electrically connected to the cell channel structures;
• second contact patterns including conductive patterns on the first contact patterns and contact pattern barrier layers on side surfaces and lower surfaces of the conductive patterns;
• an information storage structure on the second contact patterns;
• a peripheral transistor including a peripheral gate electrode and a peripheral source/drain;
• a peripheral conductive interconnection line on the peripheral transistor and electrically connected to the peripheral transistor;
• and
• a contact structure including a first contact plug portion electrically connected to the bit line structure, a second contact plug portion electrically connected to the peripheral conductive interconnection line, a connection portion extending from the first contact plug portion and the second contact plug portion, and a contact barrier layer on a side surface and a lower surface of the first contact plug portion, a side surface and a lower surface of the second contact plug, and a side surface and a lower surface of the connection portion.