Systems and methods for producing epitaxial wafers

A system for controlling flatness of an epitaxial semiconductor wafer, comprising:

• a polishing assembly;
• a measuring device;
• and
• a computer system in communication with the polishing assembly and the measuring device, the computer system including at least one processor and a memory storing instructions that, when executed by the at least one processor, cause the computer system to:
• measure one or more first semiconductor wafers having epitaxial layers deposited thereon using the measuring device to determine a thickness profile of an epitaxial deposition layer produced by an epitaxy apparatus;
• polish a second semiconductor wafer using the polishing assembly, before epitaxial layers are deposited on the second semiconductor wafer, according to one or more process conditions;
• measure the polished second semiconductor wafer using the measuring device to determine a near-edge surface profile of the polished second semiconductor wafer;
• determine a predicted post-epitaxy near-edge parameter of the polished second semiconductor wafer by comparing the determined near-edge surface profile of the polished second semiconductor wafer and the determined thickness profile produced by the epitaxy apparatus;
• determine whether the predicted post-epitaxy near-edge parameter meets a predetermined parameter specification;
• and
• in response to determining that the predicted post-epitaxy near-edge parameter does not meet the predetermined parameter specification, determine, based on the predicted post-epitaxy parameter, one or more adjustments to the process conditions of the polishing assembly and adjusting, based on the determined one or more adjustments to the process conditions, one or more process conditions of the polishing assembly to control a parameter of the near-edge surface profile of the polished second semiconductor wafer.

A system for controlling flatness of an epitaxial semiconductor wafer, comprising:

• a polishing assembly;
• a measuring device;
• and
• a computer system in communication with the polishing assembly and the measuring device, the computer system including at least one processor and a memory storing instructions that, when executed by the at least one processor, cause the computer system to:
• measure one or more first semiconductor wafers having epitaxial layers deposited thereon using the measuring device to determine a thickness profile of an epitaxial deposition layer produced by an epitaxy apparatus;
• polish a second semiconductor wafer using the polishing assembly, before epitaxial layers are deposited on the second semiconductor wafer, according to one or more process conditions;
• measure the polished second semiconductor wafer using the measuring device to determine a surface profile of the polished second semiconductor wafer;
• superimpose the determined thickness profile of the epitaxial deposition layer on the determined surface profile of the polished second semiconductor wafer to determine a predicted post-epitaxy parameter of the polished second semiconductor wafer, wherein the predicted post-epitaxy parameter is a flatness parameter comprising at least one of SBIR, GBIR, SFQR, and ESFQR;
• determine whether the predicted post-epitaxy parameter meets a predetermined parameter specification;
• and
• in response to determining that the predicted post-epitaxy parameter does not meet the predetermined parameter specification, determine, based on the predicted post-epitaxy parameter, one or more adjustments to the process conditions of the polishing assembly and adjusting, based on the determined one or more adjustments to the process conditions, one or more process condition conditions of the polishing assembly.