Non-volatile memory device and manufacturing technology

A method, comprising:

• forming a memory cell stack over a substrate, the memory cell stack comprising a first conductive layer, a resistance switching dielectric layer over the first conductive layer, a second conductive layer over the resistance switching dielectric layer;
• forming a hard masking stack over the memory cell stack, wherein the hard masking stack comprises a first insulating layer at bottom contacting the second conductive layer and a first metal layer and a second metal layer disposed over the first insulating layer and separated from one another by a second insulating layer;
• performing a series of etch to the hard masking stack to form a hard mask;
• and
• according to the hard mask, patterning the second conductive layer and the resistance switching dielectric layer to form a top electrode and a resistance switching dielectric.

A method for manufacturing a memory cell, the method comprising:

• depositing and patterning a first conductive layer over a substrate, a resistance switching dielectric layer over the first conductive layer, and a second conductive layer over the resistance switching dielectric layer;
• depositing and patterning a masking stack directly on the second conductive layer, the masking stack including a first metal layer and a second metal layer separated from one another by an insulating layer;
• and
• forming a conductive via through the masking stack reaching an upper surface of the second conductive layer.