Semiconductor device

A device comprising:

• a plurality of channel layers arranged one above another in a spaced apart manner and extending in a first direction in a top view;
• a gate structure surrounding each of the plurality of channel layers and extending in a second direction different from the first direction in the top view, wherein the gate structure comprises gate dielectric layers surrounding the plurality of channel layers and at least one metal layer;
• a first source/drain epitaxial structure and a second source/drain epitaxial structure on opposite sides of the gate structure and connected to the channel layers;
• an inner spacer between the gate structure and the first source/drain epitaxial structure;
• a backside via connected to the first source/drain epitaxial structure;
• and
• a substrate residue in contact with the first source/drain epitaxial structure and the inner spacer but spaced apart from the gate structure.

A device comprising:

• an isolation structure, wherein a top surface of the isolation structure is non-planar;
• a gate structure across the isolation structure;
• a first source/drain epitaxial structure and a second source/drain epitaxial structure on opposite sides of the gate structure;
• a channel structure embedded in the gate structure and connected to the first source/drain epitaxial structure and the second source/drain epitaxial structure;
• a front-side source/drain contact over the first source/drain epitaxial structure;
• and
• a backside via under the first source/drain epitaxial structure, wherein the first source/drain epitaxial structure comprises a first portion and a second portion between the first portion and the backside via, and a width of the first portion is greater than a width of the second portion.