Memory device
AssigneeSK hynix Inc.
InventorHeon Yong CHANG
Life of this patent
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Abstract
A memory device including a first semiconductor structure including a bit line extending in a first direction, a second semiconductor structure disposed below the first semiconductor structure, a first bonding structure disposed between the first semiconductor structure and the second semiconductor structure, and including a first bonding contact, and a second bonding structure disposed between the first bonding structure and the second semiconductor structure, and including a second bonding contact, wherein the first bonding contact may penetrate the bit line in a direction perpendicular to the first direction.
Claims20
A memory device comprising:
- a first semiconductor structure including a bit line extending in a first direction;
- a second semiconductor structure disposed below the first semiconductor structure;
- a first bonding structure disposed between the first semiconductor structure and the second semiconductor structure, and including a first bonding insulating layer, a first bonding pad disposed within the first bonding insulating layer, and a first bonding contact connected to the first bonding pad;
- and
- a second bonding structure disposed between the first bonding structure and the second semiconductor structure, and including a second bonding insulating layer, a second bonding pad disposed within the second bonding insulating layer and having an upper surface in contact with a lower surface of the first bonding pad, and a second bonding contact connected to the second bonding pad,
- wherein the first bonding contact penetrates the bit line in a direction perpendicular to the first direction.
A memory device comprising:
- a first semiconductor structure including a bit line extending in a first direction;
- a second semiconductor structure disposed below the first semiconductor structure;
- a first bonding structure disposed between the first semiconductor structure and the second semiconductor structure, and including a first bonding insulating layer, a first bonding pad disposed within the first bonding insulating layer, and a first bonding contact connected to the first bonding pad;
- and
- a second bonding structure disposed between the first bonding structure and the second semiconductor structure, and including a second bonding insulating layer, a second bonding pad disposed within the second bonding insulating layer and having an upper surface in contact with a lower surface of the first bonding pad, and a second bonding contact connected to the second bonding pad;
- wherein the bit line includes a first portion and a second portion spaced apart from the first portion in the first direction, and the first bonding contact is located between the first portion and the second portion of the bit line.
A memory device comprising:
- a stack of first and second semiconductor structures bonded together via a bonding structure,
- wherein the first semiconductor structure includes a bit line extending in a first direction,
- wherein the bonding structure includes a first bonding contact which includes a first portion overlapping with the bit line in the first direction and a second portion positioned below the first portion of the first bonding contact, and
- wherein the first portion of the first bonding contact separates the bit line in two parts.
Dependencies are inferred from the claim text.