Three-dimensional memory device with backside gate electrode and methods of forming the same

Abstract

A memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and including a vertical stack of memory elements located at levels of the electrically conductive layers and a vertical semiconductor channel, a source layer contacting an outer sidewall of the vertical semiconductor channel, a backside gate electrode laterally surrounded by the vertical semiconductor channel and spaced from the vertical semiconductor channel by a backside gate dielectric layer, and a backside electrode contact layer in contact with the backside gate electrode and vertically spaced from the alternating stack by the source layer.

Dependencies are inferred from the claim text.