Method and hardware for accelerated test-data authentication
AssigneeNVIDIA Corporation
InventorsMahmut Yilmaz, Smbat Tonoyan, Sailendra Chadalavada, Mengyun Liu
Life of this patent
Estimating the term…
Loading patent…
AssigneeNVIDIA Corporation
InventorsMahmut Yilmaz, Smbat Tonoyan, Sailendra Chadalavada, Mengyun Liu
Estimating the term…
An integrated circuit (IC) is disclosed. In one embodiment, the IC comprises a memory and at least one processing core coupled to the memory. In one embodiment, the operations the at least one processing core operatively coupled to the memory perform comprise storing final hashes of each block chain authentication (BCA) section of an in-system test (IST) image in a write-protected portion of the memory; receiving at least one Public Key Authentication (PKA) signature; authenticating the at least one PKA signature using public key cryptography (PKC) algorithm; once the PKA signature is authenticated, using the final hash for each BCA section to authenticate a portion of the IST image associated with each BCA section using a hash engine of the at least one processing core skipping any PKA signature checks for any of the final hashes; and testing portions of the IC with the authenticated IST image portion.
An integrated circuit (IC) comprising:
A method comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
An autonomous driving system comprising a plurality of integrated circuits (ICs), wherein at least one of the plurality of ICs comprises:
A server of a data center, the server comprising a plurality of integrated circuits (ICs), wherein at least one of the plurality of ICs comprises:
Dependencies are inferred from the claim text.