Low leakage esd protection

An electronic device comprising:

• an external pin;
• internal circuitry;
• and
• an electrostatic discharge (ESD) protection block coupled between the external pin and the internal circuitry, wherein:
• the internal circuitry includes a plurality of thin-oxide MOS transistors, and the ESD protection block is fabricated with thick oxide, rather than thin oxide as used in the plurality of thin-oxide MOS transistors within the internal circuitry, such that the internal circuitry has a lower breakdown voltage than that of the ESD protection block;
• the ESD protection block is configured to connect the external pin to or disconnect the external pin from the internal circuitry based on both a status of a first voltage supply powering the ESD protection block and a presence of an ESD event at the external pin;
• the external pin is disconnected from the internal circuitry when the first voltage supply is absent, when an ESD event occurs at the external pin and/or in association with the first voltage supply;
• and
• the external pin is connected to the internal circuitry when the first voltage supply powering the ESD protection block is stably present and no ESD event occurs at the external pin or in association with the first voltage supply.

A method of operations of an electrostatic discharge (ESD) protection block of an electronic device for protecting thin-oxide metal-oxide- semiconductor (MOS) transistors within internal circuitry of the electronic device, the ESD protection block including a switch controller and a protection switch coupled between an external pin of the electronic device and the internal circuitry, the method comprising:

• disconnecting the external pin from the internal circuitry by opening the protection switch when a first voltage supply powering the ESD protection block is absent;
• disconnecting the external pin from the internal circuitry by opening the protection switch during a power-on transient stage of the first voltage supply powering the ESD protection block;
• disconnecting the external pin from the internal circuitry by opening the protection switch when an ESD event occurs at the external pin and or in association with the first voltage supply;
• and
• connecting the external pin to the internal circuitry by closing the protection switch when the first voltage supply powering the ESD protection block is stably present and no ESD event occurs at the external pin or in association with the first voltage supply, wherein:
• the opening or closing of the protection switch is controlled by the switch controller based on both a status of the first voltage supply and a presence of the ESD event at the external pin;
• and
• the thin-oxide MOS transistors within internal circuitry have a lower breakdown voltage than that of the protection switch and the switch controller.