Sense amplifier and operating method of the same

A method, comprising:

• generating, based on a voltage level of a first supply voltage for operating a memory device, a first control signal to a pull-up circuit that is coupled to a latch circuit at first and second nodes;
• transmitting, after a pulse in the first control signal, the first supply voltage to the first and second nodes by the pull-up circuit and turning off an equalization circuit in response to a second control signal to de-couple first and second output signals;
• in response to turning on an enable stage circuit, transmitting first and second current signals to the latch circuit in a biasing phase;
• turning on the equalization circuit in response to the second control signal having a pulse after the pulse in the first control signal, to equalize the first and second output signals;
• and
• sensing a current difference between the first and second current signals and generating, in response to the current difference, the first and second output signals different from each other in a sensing phase.

A method, comprising:

• generating, in response to a voltage level of a first supply voltage that is for operating a memory device and greater than a first voltage, a first control signal keeping at a first logic state during a pre-charging operation of a pair of bit lines;
• generating, in response to the voltage level of the first supply voltage being smaller than the first voltage, a pulse in the first control signal during the pre-charging operation;
• transmitting by a pull-up circuit, in response to the first control signal, the first supply voltage to first and second nodes that are coupled to a latch circuit;
• in response to turning on an enable stage circuit, transmitting first and second current signals to the latch circuit in a biasing phase;
• and
• sensing a current difference between the first and second current signals and generating, in response to the current difference, first and second output signals in a sensing phase.