Flexible and efficient neural embeddings for scaling tolerant reprogrammable analog

A method for compiling a model for execution on an analog neural processing unit (NPU), the method comprising:

• receiving the model;
• lowering the model by remapping the model architecture and re-embedding the data representation;
• executing an error tolerance process to encode feedforward error correction into model layer parameters and to schedule local error adaptation to run as part of the compiled model operation;
• executing a compression step to recover accuracy loss by retuning the compiled model;
• executing an adaptation step to converge on an adaptation mapping to control an adaptation layer of the compiled model;
• and
• outputting the compiled model, wherein the compiled model includes (i) compressed model parameters, (ii) a codebook to enable decompression of the compressed model parameters, and (iii) sequencing instructions for performing model operation and dynamic error correction.

A system, comprising:

• an interface configured to receive raw imaging data and perform preprocessing to generate analog vectors;
• a full-duplex analog vector bus coupled to the interface for routing the analog vectors;
• a plurality of pipelined analog NPU stages coupled to the analog vector bus, dynamically configured to perform fused neural network operations on the analog vectors and ultimately output a final inference based on the raw imaging data;
• and
• a battery, the battery supplying power to the interface, the full-duplex analog vector bus, and the plurality of pipelined analog NPU stages.