Gate driving circuit, display device including the gate driving circuit and electronic device including the gate driving circuit

A display device comprising:

• a display panel including a plurality of pixels;
• a data driving circuit configured to provide a data voltage to the pixels;
• a gate driving circuit configured to provide a gate signal to the pixels;
• and
• a driving controller configured to control the data driving circuit and the gate driving circuit,
• wherein the gate driving circuit includes:
• a first control circuit configured to control a voltage of a first control node based on an input signal, a first clock signal and a second clock signal;
• a second control circuit configured to control a voltage of a second control node based on the first clock signal and the second clock signal;
• and
• an output circuit configured to output the first clock signal or a first voltage as the gate signal based on the voltage of the first control node and the voltage of the second control node,
• wherein the second control circuit includes:
• a switching circuit connected to a first node and a second node, and configured to receive the second clock signal;
• a second capacitor including a first electrode connected to the first node and a second electrode connected to the second node;
• and
• a fourth capacitor including a first electrode configured to receive a second voltage and a second electrode connected to the second node.

An electronic device comprising:

• a display panel including a plurality of pixels;
• a data driving circuit configured to provide a data voltage to the pixels;
• a gate driving circuit configured to provide a gate signal to the pixels;
• a driving controller configured to control the data driving circuit and the gate driving circuit;
• and
• a processor configured to output a power-on signal, input image data and an input control signal to the driving controller,
• wherein when the electronic device is powered on, the processor is configured to output the power-on signal to the driving controller,
• wherein the driving controller is configured to output a reset signal to the gate driving circuit for initializing the gate driving circuit in response to the power-on signal, to output a start signal, a first clock signal and a second clock signal for operating the gate driving circuit in response to the input control signal,
• wherein the gate driving circuit includes:
• a first control circuit configured to control a voltage of a first control node based on an input signal, the first clock signal and the second clock signal;
• a second control circuit configured to control a voltage of a second control node based on the first clock signal and the second clock signal;
• a reset circuit configured to initialize the first control node and the second control node based on the reset signal;
• and
• an output circuit configured to output the first clock signal or a first voltage as the gate signal based on the voltage of the first control node and the voltage of the second control node,
• wherein the second control circuit includes:
• a switching circuit connected to a first node and a second node, and configured to receive the second clock signal;
• a second capacitor including a first electrode connected to the first node and a second electrode connected to the second node;
• and
• a fourth capacitor including a first electrode configured to receive a second voltage and a second electrode connected to the second node.