Memory controller and mcu chip

A memory controller coupled to a second non-volatile memory (NVM), wherein the second NVM comprises a first backup bank and a second backup bank, wherein one of the first and second backup banks is a default backup bank, and the other is an over the air (OTA) upgrade backup bank, and wherein the memory controller comprises:

• a first NVM, wherein the first NVM allows faster read and write operations than the second NVM and serves as a main memory for storing content that is necessary for operation of a system, and wherein content of the first NVM has been backed up to the default backup bank of the second NVM;
• a first memory controller responsible for a read and write control of the first NVM;
• and
• a second memory controller, wherein the second memory controller is coupled to the first memory controller and is configured to:
• in preparation for performing an OTA upgrade, program content of an OTA upgrade version into the OTA upgrade backup bank;
• after a power-on reset (POR) or a system reset and when detecting that the content of the OTA upgrade version in the OTA upgrade backup bank is valid, initiate an OTA upgrading phase and copy the content of the OTA upgrade version from the OTA upgrade backup bank to the first NVM, thereby completing the OTA upgrade;
• and when the copying succeeds, update the OTA upgrade backup bank as the default backup bank and update a previous default backup bank as the OTA upgrade backup bank for use of next OTA upgrade.