Optimized hardware implementations for monotonic, non-decreasing thresholding

A non-transitory computer readable medium storing instructions that, when executed by a combination of one or more processors, cause the combination of one or more processors to perform an operation comprising:

• providing non-linear thresholds associated with a quantization operation;
• selecting an initial threshold value for thresholding logic configured to perform the quantization operation;
• determining delta values indicating respective differences between two thresholds of the non-linear thresholds, wherein at least two of the delta values are different;
• determining a step size from the delta values;
• determining residual errors between the delta values based on the step size;
• and
• transmitting the initial threshold value, residuals, and step to the thresholding logic for performing the quantization operation.

A computing system comprising:

• circuitry comprising thresholding logic configured to:
• store an initial threshold value for the thresholding logic;
• store residual errors between delta values and a step size, the delta values indicating respective differences between two thresholds from a set of non-linear thresholds, wherein at least two of the delta values are different;
• store the step size between the set of non-linear thresholds;
• and
• calculate the set of non-linear thresholds using the initial threshold value, the residual errors, and the step size.