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AssigneeHewlett Packard Enterprise Development LP
InventorsJames D. Regan, Salma Afifi, Gregg Bernard Lesartre
Estimating the term…
One aspect provides a dual-scale counter circuit that includes a counter logic unit to store a current counter value, a range-determination logic unit to determine an operating range of the dual-scale counter circuit based on the current counter value and a predetermined threshold value, and a counter-increment logic unit. The counter-increment logic unit is to increment the current counter value linearly for an increment event in response to the dual-scale counter circuit operating in a linear range and increment the current counter value probabilistically for the increment event in response to the dual-scale counter circuit operating in a probabilistic range. The dual-scale counter circuit further includes a linear-feedback shift register to generate a random binary bit sequence, based on which the counter-increment logic unit is to determine whether to increase the current counter value for the increment event when the dual-scale counter circuit operates in the probabilistic range.
A dual-scale counter circuit, comprising:
A method, comprising:
A non-transitory machine-readable storage medium storing instructions executable by a processing resource to:
Dependencies are inferred from the claim text.