Back to results
US 2026/0064306 A1Published application
Memory system including a memory controller
AssigneeSK hynix Inc.
InventorsJae-Han PARK, Hyun-Woo KWACK
Life of this patent
Estimating the term…
Abstract
A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.
Claims20
A memory module comprising:
- a first memory chip group configured to transfer a first data through a first sub-channel;
- a second memory chip group configured to transfer a second data through a second sub-channel;
- and
- a registering clock driver configured to transfer a first command signal, a first address signal and a first clock signal, input from a memory controller, to the first memory chip group,
- wherein the first command signal, the first address signal, and the first clock signal are transferred separately from a second command signal, a second address signal, and a second clock signal which are transferred from the memory controller to the second memory chip group.
2 more elements
A memory module comprising:
- a first memory chip group configured to transfer a first data to a memory controller through a first sub-channel;
- a second memory chip group configured to transfer a second data to the memory controller through a second sub-channel;
- and
- a registering clock driver configured to transfer a clock signal to the first memory chip group or the second memory chip group,
- wherein the registering clock driver provides the clock signal to at least one of the first memory chip group and the second memory chip groups based on at least one enabling signal.
2 more elements
Dependencies are inferred from the claim text.