Optical coupling arrangements for chip connection arrangements between different chips of an integrated circuit system

A method comprising:

• preparing a surface and a first layer of an interposer chip, where the surface of the interposer chip is substantially coplanar with a first plane and the first layer is below the surface of the interposer chip, by arranging a plurality of metal contacts on the surface of the interposer chip, a plurality of optical waveguiding structures in the first layer, and one or more cutout structures that extend from the surface of the interposer chip to the first layer and expose an end of a different respective optical waveguiding structure;
• preparing a surface and a second layer of a device chip, where the surface of the device chip is substantially coplanar with a second plane and the second layer is below the surface of the device chip, by arranging a plurality of metal contacts on the surface of the device chip, a plurality of optical waveguiding structures in the second layer, and one or more protrusions extending from the device chip, where each protrusion contains at least a portion of a bend in a different respective optical waveguiding structure in the second layer and exposes an end of the optical waveguiding structure;
• aligning the surface of the interposer chip and the surface of the device chip such that the first plane and the second plane form a nonzero angle;
• aligning each of one or more protrusions of the device chip with a respective cutout structure on the surface of the interposer chip;
• receiving alignment feedback associated with a coupling of ends of the optical waveguiding structures in the one or more protrusions to respective ends of the optical waveguiding structures exposed by the one or more cutout structures;
• forming at least one connective structure between the device chip and the interposer chip based at least in part on the alignment feedback;
• and
• forming a plurality of conductive structures between each of the metal contacts on the surface of the interposer chip and a respective metal contact on the surface of the device chip.