Semiconductor-superconductor hybrid devices with a horizontally-confined channel and methods of forming the same

A method comprising:

• forming a semiconductor heterostructure over a substrate;
• forming a superconducting layer over the semiconductor heterostructure;
• forming a first gate, having a first top surface, adjacent to a first side of the semiconductor heterostructure;
• and
• forming a second gate, having a second top surface, adjacent to a second side, opposite to the first side, of the semiconductor heterostructure, wherein each of the first top surface of the first gate and the second top surface of the second gate is offset vertically from a top surface of the semiconductor heterostructure by a predetermined offset amount, wherein the predetermined offset amount is selected to ensure that a horizontally-confined electrostatic channel is formed at a selected distance from the top surface of the semiconductor heterostructure to reduce an effect of any line edge roughness (LER) associated with the superconducting layer.

A method comprising:

• forming a semiconductor heterostructure over a substrate;
• forming a superconducting layer over the semiconductor heterostructure;
• forming a first gate, having a first top surface, adjacent to a first side of the semiconductor heterostructure;
• forming a second gate, having a second top surface, adjacent to a second side, opposite to the first side, of the semiconductor heterostructure, wherein each of the first top surface of the first gate and the second top surface of the second gate is offset vertically from a top surface of the semiconductor heterostructure by a predetermined offset amount, wherein the predetermined offset amount is selected to ensure that a horizontally-confined electrostatic channel is formed at a selected distance from the top surface of the semiconductor heterostructure to reduce an effect of any line edge roughness (LER) associated with the superconducting layer;
• and
• forming a first terminal coupled to the first gate and a second terminal coupled to the second gate, wherein the electric field is generated by an application of a first voltage to the first terminal and a second voltage to the second terminal.

A method comprising:

• forming a first isolated semiconductor heterostructure and a second isolated semiconductor heterostructure formed over a substrate;
• forming a left gate adjacent to a first side of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure;
• forming a right gate adjacent to a second side, opposite to the first side, of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure, wherein a top surface of each of the left gate and the right gate is offset vertically from a top surface of each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure by a predetermined offset amount, wherein the semiconductor-superconductor hybrid device is configured to form a horizontally-confined electrostatic channel in a respective isolated semiconductor heterostructure in response to an application of an electric field to the respective isolated semiconductor heterostructure via a respective left gate and a respective right gate, wherein the predetermined offset amount is selected to ensure that the horizontally-confined electrostatic channel is formed at a selected distance from the top surface of the respective isolated semiconductor heterostructure to reduce an effect of any structural disorder associated with an interface of the superconducting layer with the respective isolated semiconductor heterostructure, and wherein the structural disorder associated with the interface comprises line edge roughness (LER) associated with the superconducting layer;
• and
• forming a superconducting layer formed over each of the first isolated semiconductor heterostructure and the second isolated semiconductor heterostructure.