Semiconductor device

A semiconductor device, comprising:

• a substrate comprising an active region extending in a first direction;
• a gate structure extending in a second direction intersecting the active region on the substrate;
• a plurality of channel layers on the active region and spaced apart from each other in a third direction, which is perpendicular to an upper surface of the substrate, with the gate structure thereon;
• a source/drain region in a recessed region of the active region on at least one side of the gate structure and connected to the plurality of channel layers, wherein the source/drain region comprises a first epitaxial layer on the active region and in contact with the plurality of channel layers, and a second epitaxial layer on the first epitaxial layer, an upper surface of the second epitaxial layer comprising a first portion and a second portion having a cavity therein that extends toward the active region, the first portion extending around the cavity;
• an auxiliary epitaxial pattern in the cavity of the second epitaxial layer and having a surface defined by a crystal plane;
• a metal-semiconductor compound layer extending into an upper surface of the auxiliary epitaxial pattern, electrically connected to the source/drain region, and extending along a recessed surface of the auxiliary epitaxial pattern;
• and
• a contact plug comprising a contact conductive layer on the metal-semiconductor compound layer, and extending in the third direction.

A semiconductor device, comprising:

• a substrate having a first region and a second region;
• a first gate electrode extending on the first region in a first direction;
• a second gate electrode extending on the second region in the first direction;
• a plurality of channel layers spaced apart from each other in a second direction perpendicular to an upper surface of the substrate, the channel layers comprising first channel layers and second channel layers on the first region and the second region and with the first gate electrode and the second gate electrode thereon, respectively;
• a first source/drain region connected to the first channel layers on at least one side of the first gate electrode;
• a second source/drain region connected to the second channel layers on at least one side of the second gate electrode;
• an auxiliary epitaxial pattern extending into the second source/drain region from an upper surface thereof and electrically connected to the second source/drain region;
• a first contact plug extending into the first source/drain region from an upper surface of the first source/drain region;
• and
• a second contact plug extending into the auxiliary epitaxial pattern from an upper surface of the auxiliary epitaxial pattern,
• wherein each of the first source/drain region and the second source/drain region comprises:
• a first epitaxial layer on side surfaces of the plurality of channel layers and having a first impurity concentration;
• and
• a second epitaxial layer on the first epitaxial layer and having a second impurity concentration, greater than the first impurity concentration, and
• the semiconductor device further comprises:
• a first metal-semiconductor compound layer extending into an upper surface of the second epitaxial layer in the first source/drain region and being in contact with the second epitaxial layer of the first source/drain region and the first contact plug;
• and
• a second metal-semiconductor compound layer extending into the upper surface of the auxiliary epitaxial pattern and being in contact with the auxiliary epitaxial pattern and the second contact plug.