US 2026/0040633 A1 · SEMICONDUCTOR DEVICES

Abstract

A semiconductor device includes: an active pattern extending in a first direction and including a semiconductor material; a gate structure disposed on the active pattern, and extending in a second direction crossing the first direction; a plurality of channels spaced apart from each other in a third direction substantially perpendicular to the first and second directions; an etch stop pattern disposed on a lower surface of the gate structure; first and second source/drain layers disposed at opposite sides, respectively, of the gate structure, wherein each of the first and second source/drain layers contact the plurality of channels; a first contact plug disposed on an upper portion of the first source/drain layer; and a division structure extending through the active pattern and the etch stop pattern, wherein the division pattern is disposed on a lower surface of the gate structure.

Claims20

Dependent claims

A semiconductor device comprising:

an active pattern extending in a first direction and including a semiconductor material;
a gate structure disposed on the active pattern, and extending in a second direction crossing the first direction;
a plurality of channels spaced apart from each other in a third direction substantially perpendicular to the first and second directions, wherein each of the plurality of channels are disposed in the gate structure;
an etch stop pattern disposed on a lower surface of the gate structure;
first and second source/drain layers disposed at opposite sides, respectively, of the gate structure, wherein each of the first and second source/drain layers contact the plurality of channels;
a first contact plug disposed on an upper portion of the first source/drain layer;
and
a division structure extending through the active pattern and the etch stop pattern, wherein the division pattern is disposed on a lower surface of the gate structure.

5 more elements

A semiconductor device comprising:

an active pattern extending in a first direction;
an isolation structure covering a sidewall of the active pattern in a second direction crossing the first direction;
a gate structure disposed on the active pattern, and extending in the second direction;
a plurality of channels spaced apart from each other in a third direction that is substantially perpendicular to the first and second directions, wherein each of the plurality of channels are covered by the gate structure;
an etch stop pattern contacting a lower surface of the gate structure;
first and second source/drain layers disposed at each of opposite sides, respectively, of the gate structure, wherein each of the first and second source/drain layers contact the plurality of channels;
a first contact plug disposed on and contacting an upper portion of the first source/drain layer;
a second contact plug disposed on and contacting a lower portion of the second source/drain layer;
a division structure disposed between the first source/drain layer and the second source/drain layer, wherein the division structure includes:
a first division pattern having an upper surface contacting the lower surface of the gate structure;
and
a second division pattern extending through the active pattern and a lower portion of the first division pattern and contacting the first division pattern, wherein the second division pattern has an upper surface that is narrower than a lower surface of the first division pattern;
and
first and second wirings electrically connected to the first and second contact plugs, respectively.

11 more elements

Dependencies are inferred from the claim text.

Semiconductor devices

Life of this patent

Semiconductor devices

Life of this patent

Abstract

Claims20