Memory device

A memory device having a bonding surface, the memory device comprising:

• a substrate having a first area and a second area arranged in a first direction;
• a first circuit layer provided between the substrate and the bonding surface and including a CMOS circuit;
• a second circuit layer provided above the bonding surface;
• and
• a wiring layer provided above the second circuit layer, the wiring layer including a pad electrically connected to the CMOS circuit via the second circuit layer, wherein
• the second circuit layer includes a layer stack and a plurality of first pillars, the layer stack including, in the first area, a plurality of first insulating layers and a plurality of first conductive layers alternately stacked in a second direction crossing the first direction and including, in the second area, the first insulating layers and the first conductive layers or a plurality of first members alternately stacked in the second direction, a material of the first members being different from both of materials of the first insulating layers and the first conductive layers, the first pillars, in the first area, penetrating the layer stack in the second direction and being electrically connected to a source line above the layer stack, and
• the pad has a portion overlapping with the layer stack in the second direction and does not have a portion overlapping with the source line in the second direction.