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US 2026/0040575 A1Published application
Vertical chalcogenide memory device and method
AssigneeMicron Technology, Inc.
InventorsLorenzo Fratin, Yoshiaki Fukuzumi, Paolo Fantini, Paolo Tessariol
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Abstract
Apparatus and methods are disclosed, including chalcogenide memory cells, semiconductor devices and systems. Example semiconductor devices and methods include a number of chalcogenide material plugs electrically isolated from one another. The number of chalcogenide material plugs are electrically coupled between conducting word line layers and a number of vertical data lines.
Claims21
A chalcogenide memory device, comprising:
- an alternating stack of conducting word line layers and dielectric layers;
- a trench in the alternating stack of conducting word line layers and dielectric layers;
- a number of vertical data lines extending upward within the trench normal to layers in the alternating stack of conducting word line layers and dielectric layers;
- an isolation region in a middle portion of the trench, separating vertical data lines on either side of the trench;
- and
- a number of chalcogenide material plugs electrically isolated from one another, the number of chalcogenide material plugs electrically coupled between the conducting word line layers and the number of vertical data lines.
3 more elements
A chalcogenide memory device, comprising:
- an alternating stack of conducting word line layers and dielectric layers;
- a regular array of elongated trenches in the alternating stack of conducting word line layers and dielectric layers;
- a number of vertical data lines extending upward normal to layers in the alternating stack of conducting word line layers and dielectric layers within a first elongated trench of the regular array of elongated trenches;
- a number of chalcogenide material plugs electrically isolated from one another, the number of chalcogenide material plugs electrically coupled between the conducting word line layers and the number of vertical data lines;
- and
- an isolation structure at least partially surrounding the first trench, the isolation structure including two or more second trenches of the regular array of elongated trenches filled with a dielectric and connected together by one or more joining trenches.
3 more elements
A method, comprising:
- forming a trench in an alternating stack of conducting word line layers and dielectric layers;
- forming a number of layers within the trench, over sidewalls of the trench;
- selectively removing portions of the number of layers to form vertical data line cavities;
- filling the vertical data line cavities with a conductor to form vertical data lines within the trench adjacent to the sidewalls;
- selectively removing portions of the number of layers to form chalcogenide material cavities;
- and
- filling the chalcogenide material cavities with a chalcogenide material to form memory cells between the conducting word line layers and the vertical data lines.
4 more elements
Dependencies are inferred from the claim text.