Memory including zq calibration circuit and memory device including plurality of memories

A memory, comprising:

• an impedance adjustment (ZQ) pin connected to an external ZQ resistor;
• and
• a ZQ calibration circuit configured to perform a ZQ calibration operation,
• wherein the ZQ calibration circuit comprises:
• a driver connected to the ZQ pin and the external ZQ resistor in series;
• and
• a charge injection circuit comprising a buffer and an AC coupling capacitor,
• wherein the charge injection circuit is connected to the ZQ pin, and
• wherein the charge injection circuit is configured to inject charges in a direction corresponding to a change direction of a voltage level of a ZQ node connected to the ZQ pin.

A memory comprising:

• an impedance adjustment (ZQ) pin connected to an external ZQ resistor;
• and
• a ZQ calibration circuit configured to perform a ZQ calibration operation,
• wherein the ZQ calibration circuit comprises:
• a driver connected to the ZQ pin and the external ZQ resistor in series;
• a comparator configured to perform a comparison between a voltage level of a ZQ node connected to the ZQ pin and a voltage level of a reference voltage, and to output a comparison signal based on a result of the comparison;
• a charge injection circuit comprising a buffer and an AC coupling capacitor, wherein the charge injection circuit is connected to the ZQ pin;
• and
• a charge injection control circuit configured to output a charge injection signal to the charge injection circuit based on the comparison signal,
• wherein, based on the comparison signal indicating that the voltage level of the ZQ node is higher than the voltage level of the reference voltage, the charge injection signal transitions from a logic high value to a logic low value while a code is updated by the driver, and
• wherein, based on the comparison signal indicating that the voltage level of the ZQ node is lower than the voltage level of the reference voltage, the charge injection signal transitions from the logic low value to the logic high value while the code is updated by the driver.