Machine learning processing using flexible bit truncation
AssigneeUniversity of South Alabama
InventorsNa Gong, William Donald Oswald, Jinhui Wang, Mohamed Elsaid Shaban, Md. Bipul Hossain
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AssigneeUniversity of South Alabama
InventorsNa Gong, William Donald Oswald, Jinhui Wang, Mohamed Elsaid Shaban, Md. Bipul Hossain
Estimating the term…
A machine learning network is accessed. The network includes one or more processing layers. At least one of the processing layers is sourced with flexible bit truncation storage hardware. A flexible bit truncation setting is determined for the at least one of processing layers. The determining is based on an application to be executed on the network. At least one additional flexible bit truncation setting is determined, enabling at least two processing layers to be sourced with flexible bit truncation storage hardware. At least one of the additional flexible bit truncation settings is different from the flexible bit truncation setting. The flexible bit truncation setting is programmed in the flexible bit truncation storage hardware of the processing layers. The application is executed using the flexible bit truncation setting. The flexible bit truncation storage hardware comprises a static RAM (SRAM).
A method for machine learning processing comprising:
A computer program product embodied in a non-transitory computer readable medium for machine learning processing, the computer program product comprising code which causes one or more processors to perform operations of:
A computer system for machine learning processing comprising:
Dependencies are inferred from the claim text.