Storage device including nonvolatile memory

A storage device comprising:

• a memory device having a first wafer and a second wafer that vertically overlap each other;
• and
• a controller,
• the first wafer including:
• a plurality of first word lines that are vertically stacked;
• a plurality of odd cell plugs that vertically pass through the plurality of first word lines and are connected to a plurality of odd bit lines;
• and
• a plurality of first memory cells that are disposed in areas where the plurality of first word lines surround the plurality of odd cell plugs,
• the second wafer including:
• a plurality of second word lines and a plurality of third word lines that are vertically stacked;
• a plurality of even cell plugs that vertically pass through the pluralities of second and third word lines and are connected to a plurality of even bit lines;
• a plurality of second memory cells that are disposed in areas where the plurality of second word lines surround the plurality of even cell plugs;
• and
• a plurality of third memory cells that are disposed in areas where the plurality of third word lines surround the plurality of even cell plugs, and
• wherein the controller encodes a first type of data to generate a first code and a second code, stores the first code in one of the plurality of first memory cells, and stores the second code in one of the plurality of second memory cells, and
• wherein the controller encodes a second type of data to generate a third code, and stores the third code in one of the plurality of third memory cells.

A storage device comprising:

• a memory device having a first wafer and a second wafer that vertically overlap each other;
• and
• a controller,
• the first wafer including:
• a plurality of first word lines and a plurality of second word lines that are vertically stacked;
• a plurality of first memory cells that are connected to the plurality of first word lines;
• and
• a plurality of second memory cells that are connected to the plurality of second word lines,
• the second wafer including:
• a plurality of third word lines and a plurality of fourth word lines that are vertically stacked;
• a plurality of third memory cells that are connected to the plurality of third word lines;
• and
• a plurality of fourth memory cells that are connected to the plurality of fourth word lines,
• wherein the controller encodes a first type of data to generate a first code and a second code, stores the first code in one of the plurality of first memory cells, and stores the second code in one of the plurality of third memory cells, and
• wherein the controller encodes a second type of data to generate a third code, and stores the third code in one of the pluralities of second and fourth memory cells.

A storage device comprising:

• a memory device including a first wafer and a second wafer that vertically overlap each other;
• and
• a controller,
• the first wafer including:
• a plurality of first word lines which are vertically stacked;
• a plurality of first cell plugs that vertically pass through the plurality of first word lines;
• and
• a plurality of first memory cells that are disposed in areas where the plurality of first word lines surround the plurality of first cell plugs,
• the second wafer including:
• a plurality of second word lines that are vertically stacked;
• a plurality of second cell plugs that vertically pass through the plurality of second word lines;
• and
• a plurality of second memory cells that are disposed in areas where the plurality of second word lines surround the plurality of second cell plugs,
• wherein the controller encodes data to generate a first code and a second code, stores the first code in one of the plurality of first memory cells, and stores the second code in one of the plurality of second memory cells.