Oversampling Single-Ended SAR DAC With Reference Ripple Cancellation

An apparatus comprising:

• a non-switching Digital to Analog Converter (DAC);
• a switching DAC, configured to sample an input voltage onto a plurality of first binary weighted capacitors during a first sampling phase;
• a comparator configured to compare a first output of the switching DAC to a second output of a non-switching DAC during a first conversion phase;
• and
• a Successive Approximation Register (SAR) logic circuit, configured to generate a digital code from the comparison of the first output to the second output, and to apply the digital code to the non-switching DAC during a second conversion phase subsequent to the first conversion phase.

A method for reference ripple cancellation in an oversampled single-ended Successive Approximation Register (SAR) Analog to Digital Converter (ADC) comprising:

• comparing a first output of a switching Digital to Analog Converter (DAC) to a second output of a non-switching DAC during a current conversion phase;
• generating a digital code from the comparison of the first output to the second output by successively approximating an input voltage with a plurality of first binary weighted capacitors of the switching DAC, switchably connected to one of a high reference voltage and a low reference voltage;
• and
• applying the digital code to the non-switching DAC during a subsequent conversion phase, subsequent to the current conversion phase.