Driving circuit, display apparatus, and electronic apparatus

A display apparatus comprising:

• a first driving circuit comprising a plurality of first stages;
• a second driving circuit comprising a plurality of second stages;
• and
• a third driving circuit comprising a plurality of third stages, each of the plurality of third stages comprising a control transistor comprising a gate configured to receive a node signal from a corresponding second stage from among the plurality of second stages, the control transistor being configured to output a selection signal based on an enable signal that is input when a voltage of the gate of the control transistor is a gate-on voltage,
• wherein each of the plurality of first stages is configured to receive the selection signal from a corresponding third stage from among the plurality of third stages.

A driving circuit comprising a plurality of stages, each of the plurality of stages comprising:

• a pull-up transistor configured to transmit a first voltage to an output terminal;
• a pull-down transistor configured to transmit a second voltage lower than the first voltage to the output terminal;
• and
• a first masking transistor connected between a first node configured to receive a voltage level of a start signal and a gate of the pull-down transistor, the first masking transistor comprising a gate configured to receive a selection signal,
• wherein, in a mode in which the display apparatus is configured to display images with different driving frequencies for each area, the selection signal is a gate-off voltage of the first masking transistor.

An electronic apparatus comprising:

• a pixel area;
• and
• a driving circuit configured to drive a plurality of pixels in the pixel area, the driving circuit comprising a plurality of stages, each of the stages comprising:
• a pull-up transistor configured to transmit a first voltage to an output terminal;
• a pull-down transistor configured to transmit a second voltage lower than the first voltage to the output terminal;
• and
• a control transistor connected between a first terminal configured to receive an enable signal and a second terminal configured to output a selection signal, the control transistor comprising a gate connected to a gate of the pull-down transistor,
• wherein, when a voltage of the gate of the pull-down transistor is a gate-on voltage, the control transistor is configured to output the selection signal based on the enable signal, and the pull-down transistor is configured to transmit an output signal to the output terminal based on the second voltage.