US 2026/0031033 A1Published application

Display panel and driving method thereof

AssigneeXiamen Tianma Optoelectronics Co., Ltd.

InventorsTingting YAN, Zongcai DING

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Abstract

The present disclosure provides a display panel and a driving method. The display panel includes a display region, including a plurality of scan lines, and a non-display region. The non-display region includes a first non-display region including a trigger signal line, a plurality of first-clock signal lines from a first first-clock signal line to a k-th first-clock signal line, a plurality of second-clock signal lines from a first second-clock signal line to a k-th second-clock signal line, and n levels of cascaded shift registers; the plurality of first-clock signal lines is electrically connected to k levels of shift registers in sequence, respectively; the plurality of second-clock signal lines is electrically connected to the k levels of shift registers in sequence, respectively; and the trigger signal line is electrically connected to shift registers from a first level to a k-th level and from an (n−k+1)-th level to an n-th-level.

Claims16

Dependent claims

A display panel, comprising:

a display region and a non-display region at least partially surrounding the display region, wherein:
the display region includes a plurality of scan lines;
the non-display region includes a first non-display region;
and the first non-display region includes a trigger signal line, a plurality of first-clock signal lines from a first first-clock signal line to a k-th first-clock signal line, a plurality of second-clock signal lines from a first second-clock signal line to a k-th second-clock signal line, and n levels of cascaded shift registers;
output terminals of the n levels of cascaded shift registers are electrically connected to the plurality of scan lines in a one-to-one correspondence, and an output terminal of an m-th-level shift register of the n levels of cascaded shift registers is electrically connected to a first terminal of an (m+k)-th-level shift register of the n levels of cascaded shift registers;
the plurality of first-clock signal lines from the first first-clock signal line to the k-th first-clock signal line is electrically connected to k levels of shift registers, of the n levels of cascaded shift registers, in sequence, respectively;
the plurality of second-clock signal lines from the first second-clock signal line to the k-th second-clock signal line is electrically connected to the k levels of shift registers in sequence, respectively;
and
the trigger signal line is electrically connected to shift registers from a first level to a k-th level of the n levels of cascaded shift registers and shift registers from an (n−k+1)-th level to an n-th-level of the n levels of cascaded shift registers, wherein k is a positive integer greater than or equal to 1, n is a positive integer greater than k, m is a positive integer greater than or equal to 1, and m+k≤n.

6 more elements

A driving method of a display panel, wherein the display panel includes a display region and a non-display region at least partially surrounding the display region, wherein the display region includes a plurality of scan lines;

the non-display region includes a trigger signal line, a plurality of first-clock signal lines from a first first-clock signal line to a k-th first-clock signal line, a plurality of second-clock signal lines from a first second-clock signal line to a k-th second-clock signal line, and n levels of cascaded shift registers;
output terminals of the n levels of cascaded shift registers are electrically connected to the plurality of scan lines in a one-to-one correspondence, and an output terminal of an m-th-level shift register of the n levels of cascaded shift registers is electrically connected to a first terminal of an (m+k)-th-level shift register of the n levels of cascaded shift registers;
the plurality of first-clock signal lines from the first first-clock signal line to the k-th first-clock signal line is connected to k levels of shift registers of the n levels of cascaded shift registers in sequence, respectively;
the plurality of second-clock signal lines from the first second-clock signal line to the k-th second-clock signal line is connected to the k levels of shift registers in sequence, respectively;
and the trigger signal line is connected to shift registers from a first level to a k-th level of the n levels of cascaded shift registers and shift registers from an (n−k+1)-th level to an n-th-level of the n levels of cascaded shift registers, wherein k is a positive integer greater than or equal to 1, n is a positive integer greater than k, m is a positive integer greater than or equal to 1, and m+k≤n;
and the method comprising:
forward scanning or reverse scanning, wherein during the forward scanning, pre-charging start time points of the shift registers from the first level to the k-th level are same;
and during the reverse scanning, pre-charging start time points of the shift registers from the (n−k+1)-th level to the n-th level are same.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/943,609Filed 11 Nov 2024
Priority: CN 202410994673.723 Jul 2024
Published: 29 Jan 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

G09G 3/3225
Organic, e.g. using organic light-emitting diodes [OLED]: using an active matrix
G09G 3/20
Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes: for presentation of an…
G09G 3/3266
Organic, e.g. using organic light-emitting diodes [OLED]: details of drivers for scan electrodes
G09G 3/3677
Details of drivers for scan electrodes: suitable for active matrices only

Family

US 12,536,957 B1Related patent
US 2026/0031033 A1This patent

From the US filing history. Foreign family members aren’t listed.

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