Gate driver, display device including the gate driver, and electronic device including the display device

A display device, comprising:

• a display panel including an odd pixel and an even pixel included in a same pixel row and sharing one data line;
• a data driver configured to provide an odd data voltage and an even data voltage to the one data line;
• a gate driver configured to provide an odd gate signal and an even gate signal to the odd pixel and the even pixel, respectively;
• and
• a driving controller configured to control the data driver and the gate driver,
• wherein the odd pixel receives the odd data voltage in response to the odd gate signal, and the even pixel receives the even data voltage in response to the even gate signal,
• wherein the gate driver comprises a plurality of stages, and each of the plurality of stages comprises:
• a control circuit configured to control a voltage of at least one control node and a voltage of at least one inversion control node;
• an odd gate output circuit configured to output an odd gate signal in response to the voltage of the at least one control node and the voltage of the at least one inversion control node;
• and
• an even gate output circuit configured to output an even gate signal in response to the voltage of the at least one control node and the voltage of the at least one inversion control node.

An electronic device, comprising:

• a display panel including an odd pixel and an even pixel included in a same pixel row and sharing one data line;
• a data driver configured to provide an odd data voltage and an even data voltage to the one data line;
• a gate driver configured to provide an odd gate signal and an even gate signal to the odd pixel and the even pixel, respectively;
• a driving controller configured to control the data driver and the gate driver;
• and
• a processor configured to control the driving controller,
• wherein the odd pixel receives the odd data voltage in response to the odd gate signal, and the even pixel receives the even data voltage in response to the even gate signal,
• wherein the gate driver comprises a plurality of stages, and
• wherein each of the stages comprises:
• a control circuit configured to control a voltage of at least one control node and a voltage of at least one inversion control node;
• an odd gate output circuit configured to output an odd gate signal in response to the voltage of the at least one control node and the voltage of the at least one inversion control node;
• and
• an even gate output circuit configured to output an even gate signal in response to the voltage of the at least one control node and the voltage of the at least one inversion control node.