Display panel, display device, and electronic device including the same

An electronic device comprising:

• a display panel;
• and
• a power supply configured to provide power to the display panel,
• wherein the display panel comprises:
• a first data line;
• a second data line;
• a first pixel configured to store a first data voltage of the first data line in a first capacitor in a first period of a data writing period;
• and
• a second pixel configured to store a second data voltage of the second data line in a second capacitor in a second period of the data writing period,
• wherein the first pixel includes:
• a first-first transistor located in a first path from the first data line to the first capacitor, and configured to be turned on in response to a first signal during the first period of the data writing period, and
• wherein the second pixel includes:
• a first-second transistor located in a second path from the second data line to the second capacitor, and configured to be turned on in response to a second signal during the second period of the data writing period.

A display panel comprising:

• a data line;
• a first pixel configured to store a first data voltage of the data line in a first capacitor in a portion of a data writing period;
• and
• a second pixel configured to store a second data voltage of the data line in a second capacitor in an entire period of the data writing period,
• wherein the first pixel includes:
• a first transistor located in a path from the data line to the first capacitor, configured to be turned on in response to a first signal during the portion of the data writing period, and configured to be turned off a remaining period of the data writing period.

A display device comprising:

• a display panel including a data line, a first pixel configured to store a first data voltage of the data line in a first capacitor in a first period of a data writing period, and a second pixel configured to store a second data voltage of the data line in a second capacitor in a second period of the data writing period;
• a scan driver configured to provide a first signal, a second signal and a writing signal having an on-level during the data writing period to the first pixel and the second pixel;
• a data driver configured to provide the first data voltage and the second data voltage to the first pixel and the second pixel through the data line;
• and
• a controller configured to control the scan driver and the data driver,
• wherein the first pixel includes:
• a first-first transistor located in a first path from the data line to the first capacitor, and configured to be turned on in response to the first signal during the first period of the data writing period, and
• wherein the second pixel includes:
• a first-second transistor located in a second path from the data line to the second capacitor, and configured to be turned on in response to the second signal during the second period of the data writing period.