Chiplet Interconnect for High Bandwidth Memory Devices

Abstract

Systems or methods of the present disclosure may provide communication interfaces for communicatively coupling integrated circuit devices to high bandwidth memory (HBM) devices. In particular, the communication interfaces may support Universal Chiplet Interconnect Express (UCIe) communications between the integrated circuit devices and the HBM devices. The integrated circuit device and the HBM devices may be directly coupled to a communication bridge, such as a package substrate via package substrate bumps. The package substrate may include routing resources that facilitate communications, such as the transmission and reception of UCIe signals, between the integrated circuit device and the HBM device. As a result, the integrated circuit and the HBM devices may engage in low latency communications without demanding any additional hardware interfaces, such as embedded multi-die interconnect bridges (EMIB) or interposers.

Dependencies are inferred from the claim text.