Latency determination

Abstract

An apparatus includes: latency determination circuitry configured to determine a predicted exposed latency associated with a memory load request targeting an address in memory, the predicted exposed latency corresponding to a stall that would be caused by waiting for the memory load request to complete had the data stored at the address in memory targeted by the memory load request not been prefetched into a cache; and prefetch control circuitry configured to control issuing of prefetch requests to prefetch data from a memory system based on the predicted exposed latency.

Dependencies are inferred from the claim text.