Scalable Techniques to Process Separate Queues of Storage Access Commands from a Host System to a Memory Sub-System
AssigneeMicron Technology, Inc.
InventorLuca Bert
Life of this patent
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AssigneeMicron Technology, Inc.
InventorLuca Bert
Estimating the term…
A memory sub-system configured via instructions to: perform an analysis of queue statuses of a plurality of submission queues without accessing the submission queues; determine priorities of the submission queues based on a result of the analysis; select one or more submission queues based the priorities; retrieve, from the one or more submission queues, a subset of storage access commands in the plurality of submission queues; and execute the subset of storage access commands. After the retrieval and/or identification of the subset of storage access commands, the memory sub-system can further perform analysis of current queue statuses to identify a next subset of storage access commands for execution.
A method, comprising:
A memory sub-system, comprising:
A non-transitory computer storage medium storing instructions which, when executed in a memory sub-system, cause the memory sub-system to perform a method, comprising:
Dependencies are inferred from the claim text.