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US 2026/0020307 A1Published application
FinFET Device and Method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
Life of this patent
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Abstract
A semiconductor device includes a fin extending from a substrate, a gate stack over and along a sidewall of the fin, a spacer along a first sidewall of the gate stack and the sidewall of the fin, a dummy gate material along the sidewall of the fin, wherein the dummy gate material is between the spacer and the gate stack, and a first epitaxial source/drain region in the fin and adjacent the gate stack.
Claims21
(canceled)
A semiconductor device, comprising:
- a semiconductor region;
- a first source/drain region adjacent to a first end of the semiconductor region;
- a second source/drain region adjacent to a second end of the semiconductor region;
- a gate structure over the semiconductor region, the gate structure comprising a gate dielectric layer and a gate electrode, wherein a width of the gate structure increases as the gate structure extends away from a sidewall of the semiconductor region in a top-down view;
- and
- a spacer structure contacting a sidewall of the gate structure, a sidewall of the first source/drain region, and a sidewall of the second source/drain region.
3 more elements
A semiconductor device, comprising:
- a semiconductor region;
- a first source/drain region adjacent to a first end of the semiconductor region;
- a second source/drain region adjacent to a second end of the semiconductor region;
- a gate structure over the semiconductor region, the gate structure comprising a gate dielectric layer and a gate electrode, wherein an angle between a sidewall of the gate structure and a sidewall of the semiconductor region in a top-down view is between 10 degrees and 60 degrees;
- and
- a spacer structure contacting the sidewall of the gate structure.
3 more elements
A semiconductor device, comprising:
- a semiconductor region;
- source/drain regions adjacent to opposing ends of the semiconductor region;
- a gate structure over the semiconductor region and between the source/drain regions, the gate structure comprising a gate dielectric layer and a gate electrode;
- a dielectric layer adjacent to the semiconductor region and the gate structure in a top-down view;
- a spacer structure contacting a sidewall of the gate structure;
- and
- a corner structure between the spacer structure and the gate structure on a sidewall of the semiconductor region in the top-down view, wherein the corner structure is discrete from the spacer structure, wherein the corner structure has a first sidewall facing the semiconductor region and a second sidewall facing away from the gate structure, wherein an angle between the first sidewall of the corner structure and the second sidewall of the corner structure is between 20 degrees and 70 degrees.
4 more elements
Dependencies are inferred from the claim text.