Code processing method and apparatus

A code processing apparatus, comprising:

• a communication interface, configured to receive and send data;
• a memory, configured to store computer program instructions and data;
• and
• a processor, configured to invoke the computer program instructions and the data in the memory, to enable the code processing apparatus to perform the method comprising:
• obtaining first code corresponding to a source hardware architecture;
• performing concurrency synchronization variable recognition on the first code to obtain at least one concurrency synchronization variable, wherein the concurrency synchronization variable is a global variable for transferring a message between a plurality of threads or a variable simultaneously accessible to a plurality of threads;
• and
• querying, from the first code, concurrency synchronization memory access code corresponding to each of the at least one concurrency synchronization variable, and converting the concurrency synchronization memory access code corresponding to each of the at least one concurrency synchronization variable into corresponding sequential consistency (SC)-atomic (atomic) memory access code, wherein
• the SC-atomic memory access code corresponding to each of the at least one concurrency synchronization variable is used to generate target code applicable to a target hardware architecture.

A computer-readable storage medium, wherein the computer-readable storage medium stores a computer program or instructions, and when the computer program or instructions are executed by a computer, the computer is enabled to perform the method comprising:

• obtaining first code corresponding to a source hardware architecture;
• performing concurrency synchronization variable recognition on the first code to obtain at least one concurrency synchronization variable, wherein the concurrency synchronization variable is a global variable for transferring a message between a plurality of threads or a variable simultaneously accessible to a plurality of threads;
• and
• querying, from the first code, concurrency synchronization memory access code corresponding to each of the at least one concurrency synchronization variable, and converting the concurrency synchronization memory access code corresponding to each of the at least one concurrency synchronization variable into corresponding sequential consistency (SC)-atomic (atomic) memory access code, wherein
• the SC-atomic memory access code corresponding to each of the at least one concurrency synchronization variable is used to generate target code applicable to a target hardware architecture.