US 2026/0004853 A1 · CONFIGURABLE LOW VOLTAGE DETECTION THRESHOLD AT A MEMORY SYSTEM

Abstract

Methods, systems, and devices for configurable low voltage detection threshold at a memory system are described. The described techniques provide for a memory system to adjust a low voltage detection (LVD) threshold according to an interface speed of the memory system. The LVD threshold may be correlated with the interface speed, such that when operating at a relatively high interface speed, the memory system may set the LVD threshold to a relatively high value and when operating at a relatively low interface speed, the memory system may set the LVD threshold to a relatively low value. Additionally, or alternatively, the memory system may be configured to adjust the LVD threshold when changing an interface speed for subsequent operations. For example, the memory system may receive a command indicating a second interface speed and may set the LVD threshold to a second value that is associated with the second speed.

Claims25

Dependent claims

A memory system, comprising:

one or more memory devices;
and
processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
operate the memory system in accordance with a first speed of an interface associated with transferring data between a controller of the memory system and one or more memory devices of the memory system;
set a threshold to a first value, the threshold associated with detecting voltage supply errors at the memory system, wherein the first value is in accordance with the first speed;
and
determine whether to suspend one or more operations in response to comparing a voltage supplied to the memory system with the threshold set to the first value.

4 more elements

A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of a memory system, cause the memory system to:

operate the memory system in accordance with a first speed of an interface associated with transferring data between a controller of the memory system and one or more memory devices of the memory system;
set a threshold to a first value, the threshold associated with detecting voltage supply errors at the memory system, wherein the first value is in accordance with the first speed;
and
determine whether to suspend one or more operations in response to comparing a voltage supplied to the memory system with the threshold set to the first value.

1 more element

Dependencies are inferred from the claim text.

Configurable low voltage detection threshold at a memory system

Life of this patent

Configurable low voltage detection threshold at a memory system

Life of this patent

Abstract

Claims25