Apparatus and methods for reference read techniques for threshold selector device memory

A system comprising:

• a plurality of data modules, each data module comprising a plurality of data memory cells, each data memory cell comprising an ovonic threshold switch, the ovonic threshold switches comprising a first threshold voltage distribution and a second threshold voltage distribution;
• a first reference module that includes a first plurality of first reference memory cells, each first reference memory cell comprising an ovonic threshold switch comprising a first reference threshold voltage distribution;
• a plurality of word lines coupled to the plurality of data memory cells and the first plurality of first reference memory cells;
• a voltage ramp control circuit coupled to the plurality of data modules and the first reference module, the voltage ramp control circuit configured to generate a ramping output voltage;
• and
• a control circuit coupled to the plurality of data modules, the first reference module and the voltage ramp control circuit, the control circuit configured to:
• couple the ramping output voltage to a selected data memory cell from each of the plurality of data modules and a selected first reference memory cell from the first reference module;
• determine that the selected first reference memory cell switches from a non-conducting state to a conducting state;
• and
• first read each of the selected data memory cells using the ramping output voltage a first predetermined delay time after the selected first reference memory cell switches from the non-conducting state to the conducting state.

A method comprising:

• writing a reference memory cell to a first memory state and writing data to a plurality of data memory cells, the reference memory cell and the data memory cells each comprising an ovonic threshold switch, the ovonic threshold switches comprising a first threshold voltage distribution and a second threshold voltage distribution;
• applying a ramping voltage to word lines coupled to the reference memory cell and the data memory cells;
• determining that the reference memory cell has switched from a non-conducting state to a conducting state;
• stopping the ramping voltage a first predetermined delay time after the reference memory cell switched from the non-conducting state to the conducting state;
• and
• reading the plurality of data memory cells at the stopped ramp voltage.