Digital-to-analog converter (dac) clock spur reduction for multiple-input multiple-output (mimo) applications
AssigneeQUALCOMM Incorporated
InventorsAndrew WEIL, Shahin MEHDIZAD TALEIE
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AssigneeQUALCOMM Incorporated
InventorsAndrew WEIL, Shahin MEHDIZAD TALEIE
Estimating the term…
Certain aspects of the present disclosure provide techniques and apparatus for signal transmission. An example apparatus generally includes: a first transmission chain including a first clock generator and a first digital-to-analog converter (DAC), an output of the first clock generator being coupled to a clock input of the first DAC, wherein the first transmission chain further includes a first digital data path coupled to an input of the first DAC; a second transmission chain including a second clock generator and a second DAC, an output of the second clock generator being coupled to a clock input of the second DAC, wherein the second transmission chain further includes a second digital data path coupled to an input of the second DAC; and a controller configured to set a first data phase associated with the first digital data path based on a first clock phase associated with the first clock generator.
An apparatus for signal transmission, comprising:
A method for signal transmission, comprising:
A wireless device, comprising:
Dependencies are inferred from the claim text.