US 2025/0337446 A1 · PROGRAMMABLE RF FRONT END FOR WIDEBAND ADC-BASED RECEIVER

Abstract

A receiver includes an antenna block configured to transduce impinging electromagnetic signals into electrical signals; a signal conditioning block configured to condition electrical signals received from the antenna block; and a down-converter block configured to down-convert conditioned electrical signals received from the signal conditioning block. The down-converter block comprises a plurality of signal channels. The receiver further includes a plurality of analog-to-digital converters (ADCs) respectively connected to the signal channels of the down-converter block; and a field-programmable gate array (FPGA). The FPGA is configured to program the down-converter block by selecting a set of mixer frequencies and a set of bandwidths designed to remove interference signals in each signal channel. The selections are calculated to mitigate reductions in dynamic range in the ADCs due to interference. The FPGA is further configured to process digital signals received from the ADCs after the down-converter block has removed the interference signals.

Claims20

Dependent claims

A device comprising:

a down-converter block configured to down-convert electrical signals, the down-converter block comprising a signal channel,
wherein the signal channel comprises a mixer having an output, a switch filter connected to the output, and a down-conversion mixer directly connected to an output of the switch filter;
a frequency synthesizer connected to the mixer;
an analog-to-digital converter (ADC) connected to the signal channel;
and
a field-programmable gate array (FPGA) connected to the ADC, to the frequency synthesizer, and to the switch filter, wherein the FPGA is configured to perform operations comprising:
programming the down-converter block by selecting a mixer frequency to be sent to the frequency synthesizer and a bandwidth to be sent to the switch filter,
wherein the mixer frequency and the bandwidth are associated with removing an interference signal, and
wherein the mixer frequency and the bandwidth are associated with mitigating reductions in a dynamic range in the ADC due to the interference signal;
and
processing digital signals received from the ADC after the down-converter block has removed the interference signal.

8 more elements

Dependencies are inferred from the claim text.

Programmable rf front end for wideband adc-based receiver

Life of this patent

Programmable rf front end for wideband adc-based receiver

Life of this patent

Abstract

Claims20