Buffer and integrated circuit

A buffer comprising:

• an operational amplifier, whose non-inverting or inverting input terminal receives an output of a pre-stage circuit;
• a voltage-voltage feedback network for the operational amplifier, whose first end is coupled to the inverting input terminal of the operational amplifier;
• an isolation resistor, whose first end is coupled to an output terminal of the buffer;
• and
• a first set of switches and a second set of switches, configured to close the first set of switches and open the second set of switches in the case where the buffer drives a first capacitive load, and to open the first set of switches and close the second set of switches in the case where the buffer drives a second capacitive load, such that:
• in the case where the buffer drives the first capacitive load, an output terminal of the operational amplifier is coupled to the output terminal of the buffer via at least one switch in the first set of switches, and a second end of the voltage-voltage feedback network is coupled to the output terminal of the buffer via at least one switch in the first set of switches or directly coupled to a second end of the isolation resistor so that the isolation resistor is used as a feedback resistor for the operational amplifier, and
• in the case where the buffer drives the second capacitive load, the output terminal of the operational amplifier is coupled to the second end of the isolation resistor via at least one switch in the second set of switches, and the second end of the voltage-voltage feedback network is coupled to the output terminal of the operational amplifier via at least one switch in the second set of switches.