Semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsBrian CRAFTON, Xiaoyu SUN
Life of this patent
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Abstract
A device includes a first register, a second register, a third register and a first logic element. The first register is configured to store first input data. The second register is configured to store first weight data. The third register is configured to output first output data according to each of the first input data and the first weight data. The first logic element is configured to control the first register according to each of first bit data and second bit data. The first bit data and the second bit data correspond to the first input data and the first weight data, respectively.
Claims20
A device, comprising:
- a first register configured to store first input data;
- a second register configured to store first weight data;
- a third register configured to output first output data according to each of the first input data and the first weight data;
- and
- a first logic element configured to control the first register according to each of first bit data and second bit data,
- wherein the first bit data and the second bit data correspond to the first input data and the first weight data, respectively.
A device, comprising:
- a first processing element configured to store first output data according to each of first input data, first weight data, first bit data and second bit data, the first processing element comprising:
- a first register configured to output the first output data;
- and
- a first logic element configured to control the first register according to each of the first bit data and the second bit data;
- a second logic element configured to generate the first bit data according to the first input data;
- and
- a third logic element configured to generate the second bit data according to the first weight data.
A method, comprising:
- storing first input data by a first register;
- generating first bit data according to the first input data;
- generating second bit data according to first weight data;
- controlling the first register by a first logic element according to each of the first bit data and the second bit data;
- and
- calculating the first input data and the first weight data according to the first bit data and the second bit data.
Dependencies are inferred from the claim text.