Issuing of Chip-Configuration Requests to an On-Chip Configuration Control Bus

A computer system comprising:

• a plurality of chips, each comprising a respective local chip-configuration control bus arranged to communicate chip configuration settings to chip-configuration registers of the chip and thereby configure the chip, each chip-configuration register having an address within a local chip-configuration register address space of the respective chip;
• an inter-chip data interconnect arranged to communicate application data content between different ones of the chips;
• and
• a host, wherein a first of the plurality of chips is connected to the host via a host interconnect other than the inter-chip data interconnect, but a second of the plurality of chips is not connected to the host other than via the first chip and the inter-chip data interconnect;
• wherein the first chip is arranged to:
• a) based on information from the host received via the host interconnect, obtain chip-configuration requests each comprising a target chip ID specifying a target chip from among the plurality of chips, a target chip-configuration register address specifying a target chip-configuration register on the target chip, and a target chip-configuration setting;
• b) when the target chip ID matches a chip ID of the first chip, supply the target chip-configuration setting via the local chip-configuration control bus of the first chip to the target chip-configuration register address within the local chip-configuration register address space of the first chip;
• and c) when the target chip ID matches a chip ID of the second chip, cause the chip-configuration request to be tunnelled over the inter-chip data interconnect to the second chip, where the second chip is configured to supply the tunnelled chip-configuration setting via the respective chip-configuration control bus of the second chip to the target chip-configuration register address within the chip-configuration register address space of the second chip.