Semiconductor package and semiconductor package assembly with edge interconnection and method of forming the same

An IC stack comprising:

• a plurality of integrated circuit (IC) structure horizontally separate with each other, wherein each IC structure comprises a top surface, a bottom surface opposite to the top surface, and four sidewalls with a first sidewall, a second sidewall, a third sidewall and a fourth sidewall;
• wherein the area of the bottom surface or the top surface is larger than that of any of the four sidewalls;
• a set of upward extending thermal conductivity layers, wherein a corresponding upward extending thermal conductivity layer is disposed between any two adjacent IC structures of the plurality of IC structures;
• and
• a first laterally extending thermal conductivity layer covering each second sidewall of the plurality of IC structures and thermally coupling to the set of upward extending thermal conductivity layers;
• wherein the thermal conductivity of any upward extending thermal conductivity layer and/or the laterally extending thermal conductivity layer is higher than that of Si.