Adaptive and incremental circuit design implementation

An apparatus for circuit design processing, comprising:

• a memory;
• and
• one or more processors coupled to the memory and configured to:
• perform, via a first processing unit, a first stage of a design process for a circuit design;
• collect data associated with processing at least a portion of the circuit design via the first processing unit;
• provide at least a portion of the collected data to a second processing unit to perform a second stage of the design process for at least the portion of the circuit design to yield a circuit processing result;
• and
• provide the circuit processing result to the first processing unit to aid in performing the first stage of the design process.

A method for circuit design processing, comprising:

• performing a first portion of a design process for a circuit design;
• collecting data associated with processing at least a portion of the circuit design;
• and
• training at least one machine learning (ML) model configured to recommend one or more actions to be performed for the design process, wherein the at least one ML model is trained based on the collected data, and wherein a second portion of the design process for the circuit design is performed using the at least one trained ML model.