Bridge chip, semiconductor package including bridge chip and method for manufacturing the same

A semiconductor package, comprising:

• a substrate comprising a cavity;
• a bridge die disposed within the cavity, wherein the bridge die comprises a plurality of signal wires and one or more capacitor structures;
• a first semiconductor die on the substrate and the bridge die;
• and
• a second semiconductor die on the substrate and the bridge die,
• wherein the second semiconductor die is spaced apart from the first semiconductor die in a first horizontal direction,
• wherein the plurality of signal wires electrically couple the first semiconductor die with the second semiconductor die,
• wherein the plurality of signal wires extend in a third horizontal direction between the first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, and
• wherein the one or more capacitor structures are disposed around the plurality of signal wires.

A semiconductor package, comprising:

• a substrate comprising a cavity;
• a bridge die disposed within the cavity, wherein the bridge die comprises a plurality of signal wires and one or more capacitor structures;
• a first semiconductor die on the substrate and the bridge die;
• a plurality of first connection members between the bridge die and the first semiconductor die;
• a second semiconductor die on the substrate and the bridge die and spaced apart from the first semiconductor die in a first horizontal direction;
• and
• a plurality of second connection members between the bridge die and the second semiconductor die,
• wherein the plurality of first connection members are disposed in a first line along a side surface of the first semiconductor die facing the second semiconductor die,
• wherein the plurality of second connection members are disposed in a second line along a side surface of the second semiconductor die facing the first semiconductor die;
• wherein each of the plurality of signal wires electrically couples a corresponding first connection member of the plurality of first connection members with a corresponding second connection member of the plurality of second connection members,
• wherein the plurality of signal wires extend in a third horizontal direction between the first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, and
• wherein the one or more capacitor structures are disposed around the plurality of signal wires.